1. Field of the Invention
The invention relates to a semiconductor device.
2. Description of Related Art
Japanese Patent Application Publication No. 2005-116962 (JP 2005-116962 A) describes a package-type semiconductor device in which heat sinks are respectively joined to both sides of a semiconductor chip. An emitter electrode is formed on one surface of the semiconductor chip, and a gate wiring layer is formed around the emitter electrode. A dummy wiring layer that is electrically isolated from the gate wiring layer is formed between the emitter electrode and the gate wiring layer. A metal block is joined to a surface of the emitter electrode via a plated layer and a solder layer. An upper heat sink is joined to a surface of the metal block via the solder layer. A collector electrode is formed on the other surface of the semiconductor chip, and a lower heat sink is joined to a surface of the collector electrode via a solder layer. Typically, with a package-type semiconductor device in which heat sinks are joined to both sides of the semiconductor chip, the heat sinks, metal block, and substrate expand at different thermal expansion rates following a change in temperature, so the plated layer may slide. With the technology described in JP 2005-116962 A, even if the plated layer slides following a change in temperature, the plated layer is able to be stopped by the dummy wiring. Therefore, the emitter electrode is able to be prevented from becoming electrically connected to the gate wiring layer via the plated layer (i.e., a short is prevented).
With the technology described in JP 2005-116962 A, the sliding of the plated layer is stopped by the dummy wiring, so the plated layer is prevented from becoming electrically connected to the gate wiring layer. However, the inventors discovered through intense study that with this kind of semiconductor device, not only the plated layer, but also the electrode that is joined to the plated layer, may slide due to a change in temperature. Therefore, in the technology described in JP 2005-116962 A, there is a possibility that, although a short between the emitter electrode and the gate wiring electrode due to the plating layer sliding is able to be prevented, sliding of the emitter electrode is unable to be inhibited. If the electrode slides, the reliability of the semiconductor device may be diminished.